Low Temperature Material Discovery and Characterization for First Level Interconnect
Presentation: Call-for-Participation Webinar (April 12 & 13 2023)
Project Statement & SOW
BackgroundThe Low Temperature Materials for First Level Interconnect Task Force reviewed material and process options currently available or under development to determine whether low temperature materials being used in other levels of electronics assembly could also be used for first level interconnects. Specifically, the group investigated interconnects contained within the first level package, including not only the interconnects of the processor but also those of all interconnects in the package of which the processor is a part.
The Task Force published a white paper that reported their findings from a literature review as well as an industry survey. They identified industrial needs and drivers that require more in-depth study to understand the assembly process challenges, material property versus reliability performance, and the feasibility of employing low temperature materials for first level interconnect. Some of the issues identified include:
- Temperature-sensitive substrates, die or sensors that require lower processing temperature for most of the current flip-chip or first level interconnect.
- The need for an interconnect material processing temperature hierarchy for multiple assembly processes that can prevent remelting issues during subsequent reflow process. Lower processing temperatures will reduce energy consumption and minimize carbon footprint.
- Limited work has been done on the reliability aspect of mixed alloy/hybrid interconnect for first level interconnects in areas such as: high current density, assessing void effects with low temp alloys / materials, understanding the availability of low temperature low alpha material and others.