PCBA Cleanliness
Section: Board Assembly

Project Leader

Mike Bixenman, KYZEN

Statement of Work & Project Statement


When it comes to cleanliness requirements for PCBAs, OEM and EMS providers are on their own to define requirements - there is no industry standard for acceptable cleanliness levels.  In addition, some component types are more problematic with regard to chemical contamination than other component types, creating further challenges for PCBA cleanliness.

Some of the concerns related to PCBA cleanliness include:
  • Companies need improved methods for developing “objective evidence” about component types that exhibit higher-than-normal failures due to contamination-related issues.
  • There is no standard for cleanliness of residues trapped under bottom-terminated components.
  • Cleanliness vs. cost trade-off is unknown (i.e., what level of cleanliness is required to achieve reliable electronics for the specific application).
  • No-clean soldering materials are designed to leave a benign residue, which can cause issues. For example:
    • When trapped under leadless and bottom-terminated components these materials can potentially trap flux activators (weak organic acids) under the bottom termination.
    • Trapped residue can be wet, pliable and active.
    • Electrochemical reliability can be compromised.
    • This problem needs to be better understood to determine the design options for either mitigating or resolving the problem. 

Project Focus & Objectives

The PCBA Cleanliness Project will focus on predicting and understanding the functional performance of low-clearance, leadless electronic packages (i.e., single row QFN) in harsh environments through measurement of electrical and chemical effects under bottom-termination components. The project team plans to establish correlations among electrical performance, cleaning methods and materials.
  • The project will focus on better methods for determining the electrochemical reliability of specific component types.
  • The team plans to develop a set of best practice guidelines for low-clearance, leadless electronic packages
    • Bare board design
    • Validating materials, process conditions, and hardware
    • Cleanliness levels
  • They will also develop test methods designed to test at the component site.
  • Deliverables from this project will be a test suite and test plan for cleanliness.



Mark Schaffer