Survey Report

Use of AOI to Inspect Fine Pitch Circuit Patterns (October 28, 2022)
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Statement of Work and Project Statement ​

• Statement of Work (Version 1.0; January 16, 2021)

• Project Statement (Version 1.0; January 16, 2021)

Background/Context

• Heterogeneous SiP packages are becoming popular as an electronics packaging solution. These packages require finer circuitry patterns designed within the substrate/interposer. However, it is difficult to validate the designed line width and spaces to be measured, and to detect the defect features, such as: 

  • Line width violations

  • Spacing violations

  • Excess copper or missing copper

• Inspection limitations are likely to impact yield assessment and quality validation on the substrates/interposers that will be used for heterogeneous SiP packages. In particular, large panel size for circuit patterns inspection becomes challenging due to warpage issues, organic panel shrinkage or AOI (automated optical inspection) system setup.

• iNEMI started the Fine Pitch Circuit Pattern Inspection Metrology project in 2016. In Phase 1 of the project, the team conducted an industry-wide survey to assess the readiness of measurement and inspection capabilities for fine circuit pattern substrates. The survey was completed in February 2017. 

• The team continued to Phase 2, which conducted an inspection capability study on a glass-based test vehicle (TV) and a silicon wafer-based TV. The TVs were designed with fine pitch pattern trace widths from 10um nominal down to 1um nominal, and included associated defect designs such as excess copper and missing copper. The sizes of these defects varied from 20%, 40%, 60% and 80% from the nominal values. Phase 2 was completed in February 2020. 

• In Phase 3, the team conducted an inspection capability study on an organic substrate test vehicle, using the same design as Phase 2. The Phase 3 project was completed in August 2021.

Purpose of Project

This new iNEMI metrology project will study defect detection plus line width and space measurement for circuit patterns below 5um line space. By participating this project, organizations can better understand the current capabilities of AOI measurement and inspection systems, as well as technology trends for AOI solutions. The ultimate goal of this project is to drive the readiness of innovative AOI inspection systems to reduce the defect escape risk for finer pattern substrate and interposers. 

• Continuing the work from Phase 3, this project will revalidate the industry trend and design rules through a survey, and will further characterize and quantify optical inspection equipment capability on 1.5um to 4um design range with additional defect types.

•  Validate the design rule and defect pattern of the Phase 3 organic TV against the survey results

• Design and fabricate new organic TV with line widths that are currently planned as 4um, 3um, 2um, 1.5um. (these line widths might be changed due to fabrication techniques)

• Additional defect types will be added per the suggestions from the survey in the TV design. Defect patterns in consideration include

o    Line width violations
o    Spacing violations
o    Excess or missing copper
o    Stain
o    Foreign material and any other defect modes which can be re-produced during TV sample fabrication

• Fabricate test vehicle of organic panel shape (250mmx 250mm size) 

• Measure the line width and inspect the defects per the designated location

• Collect data and analyze the inspection data

Presentations 

• “Fine Pitch Circuit Pattern Inspection Capability Study for Fan-out Wafer Level Packaging,” Feng Xue, IBM, Session WA1-1: iNEMI Session, May 11, 2022, 2022 International Conference on Electronics Packaging (ICEP 2022)
   
• ​Call-for-participation webinar presentation (January 20, 2022)

Previous Projects

• Phase 1: Fine Pitch Circuit Pattern Inspection/Metrology — Conducted an industry-wide survey to assess the readiness of measurement and inspection capabilities for fine circuit pattern substrates in 2016.      

• Phase 2: Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology — Performed an AOI inspection capability study on a glass-based test vehicle and a silicon wafer-based test in 2017/2018. The test vehicles were designed with fine pitch pattern trace widths from 10um nominal down to 4um nominal, and associated defect design such as excess copper and missing copper.     

• Phase 3: Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology — Conducted an AOI inspection study on an organic substrate test vehicle of the same design in 2019/2020