Project Chair: Phil Geiger (Dell)
Project Co-chair: Steve Butkovich (Cisco)
Presentation: Boundary Scan Adoption Project - End-of-Project Webinar (10/20/09)
This webinar will cover an overview of the results of the project's boundary scan survey and is open to all iNEMI members. This group's objective was to gauge the current adoption rate of boundary scan, identify any impediments to widespread use, and select areas for future research.
Increasing circuit densities and speeds are quickly reducing electrical test point access for printed circuit assembly test. Boundary-scan (JTAG/IEEE 1149.x) is a technology that will allow continued testability of printed circuit assemblies, but its use requires that it be designed into semiconductor devices. Currently, not all semiconductor suppliers support boundary scan. Wider availability of complying devices is necessary to enable cost-efficient and effective board test for future designs.
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