iNEMI Project is Analyzing Inspection Capabilities for Fine Pitch Substrates
Electronic packaging technologies are quickly moving to adopt heterogeneous integrated solutions. However, the fine lines and spacing required to achieve the high density interconnects and high I/O bandwidths of these advanced packages often push the limits of substrate fabrication and traditional inspection and measurement capabilities.
iNEMI’s Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project has been working to assess measurement and inspection capabilities and determine industry readiness to fabricate fine circuit pattern substrates in high volume.
- Limited manufacturing experience with fine pitch technology has created a lack of understanding of the capabilities needed, standards developments, etc.
- The capabilities of today’s toolsets allow investigation and evaluation for development, but are not designed for the requirements of volume manufacturing.
- The industry’s development timeline indicates that fine feature (<2um) inspection and measurement for volume production are not yet available and must be developed within the next three to five years
Verification with SEM and CMM
Fabrication variations in trace widths and spacing were evaluated by SEM measurement and used as a baseline value for the comparison with any AOI measurement data. The SEM measurements showed that the feature widths were slightly oversized relative to their design point and the spaces were slightly undersized. This would have no effect on the project evaluation, but it highlights the significance of critical measurements versus design data when evaluating fine feature development.
CMM is an optical engineering analysis tool that uses contrast/pixilation to capture line edges. It only has the capability of line/space measurement, so defect detection capability was not evaluated.
The SEM and CMM values were collected and mapped on each line width and defect location, and this data retained as the ‘gold standard’ and used as the baseline value for comparison with the AOI results.
The measurement on the glass TV showed good accuracy with respect to SEM measurement data, as the edge measurement with back lighting enhances the accuracy. However, greater deviation of measurement data on the silicon TV was observed because back lighting cannot be used on silicon.
AOI defect inspection
- Commercial equipment from Company B had the highest magnification and was capable of detecting mouse-bite defects for the 1um design. However, the image contrast was not as good as Companies D and E.
- Companies A and C demonstrated good inspection capability down to 6um.
- Optical tools with higher magnification and enough power can still be applied for 1um feature inspection/measurement for flat objectives; however, run rate is currently a challenge for both production and R&D tools.
Trace width measurements
The project team will encourage AOI companies to perform extensive trace width measurement in Phase 3.
Phase 2 conclusions
Phase 3 recently formed
Inspection limitations are likely to impact yield assessment and quality validation on the substrate/interposers used for heterogeneous SiP packages. Measurement capability for fine line (<10um) and space (<10um) on panel-sized substrates/interposers impacts both yield and performance capability. There is greater impact in organic substrate and board yield due to defects from fine-featured line width and spacing violations as well as foreign material.
The Phase 3 organic test vehicle will be designed with known defective fine-featured wiring to comprehensively examine AOI capabilities for handling differences in organic material properties such as color, reflectivity, and surface roughness as well as substrate warpage and shape deformation.
The impact by warpage and trace aspect ratio (trace thickness by trace space) will also be studied in Phase 3. Outputs from Phase 3 will include:
- Assessment of industry readiness through a comparison of inspection results from industry suppliers on fine pitch organic substrates.
- Recommendations for fine pattern circuit inspection metrology options.
For more information or to get involved with the Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project, contact Masahiro Tsuriya (email@example.com).
For additional information
Inspection / Metrology Evaluation of Fine Pitch Test Vehicles for Advanced Packages, paper presented at iNEMI Session at ICEP 2019 (April 17, 2019 / Niigata, Japan).