Electronic packaging technologies are quickly moving to adopt heterogeneous integrated solutions. However, the fine lines and spacing required to achieve the high density interconnects and high I/O bandwidths of these advanced packages often push the limits of substrate fabrication and traditional inspection and measurement capabilities.

iNEMI's Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project has been working to assess measurement and inspection capabilities and determine industry readiness to fabricate fine circuit pattern substrates in high volume.

Survey results

Phase 1 of the project conducted an industry-wide survey to assess measurement and inspection capabilities and determine industry readiness at that time. Survey results indicated a lack of readiness due to:
  • Limited manufacturing experience with fine pitch technology has created a lack of understanding of the capabilities needed, standards developments, etc. 
  • The capabilities of today's toolsets allow investigation and evaluation for development, but are not designed for the requirements of volume manufacturing. 
  • The industry's development timeline indicates that fine feature (<2um) inspection and measurement for volume production are not yet available and must be developed within the next three to five years
Fig 1 pie chart
Figure 1. Survey respondents were asked whether their measurement equipment would be capable of detecting 2um line spaces. 
Fig 2 pie chart
Figure 2. People who responded “no” to the question shown in Fig.1 were asked if their company had plans to develop the capability to detect 2um.
Based on these findings, the team launched Phase 2 of the project to characterize and quantify industry capabilities. Glass and silicon test vehicles (TVs) with line widths of 10um, 8um, 6um, 4um, 2um, and 1um were designed and fabricated. The TVs also included design features to simulate typical manufacturing defects such as 1) line width violations, 2) spacing violations, 3) excess copper or missing copper, 4) short or open circuits and 5) cuts.

Verification with SEM and CMM

“Compliance to design” was verified for the glass and silicon TVs using SEM (scanning electron microscope) and CMM (coordinate-measuring machine) inspection.

Fabrication variations in trace widths and spacing were evaluated by SEM measurement and used as a baseline value for the comparison with any AOI measurement data. The SEM measurements showed that the feature widths were slightly oversized relative to their design point and the spaces were slightly undersized. This would have no effect on the project evaluation, but it highlights the significance of critical measurements versus design data when evaluating fine feature development.
Fig 3
  Figure 3. Test vehicle design in one cell.

CMM is an optical engineering analysis tool that uses contrast/pixilation to capture line edges. It only has the capability of line/space measurement, so defect detection capability was not evaluated.

The SEM and CMM values were collected and mapped on each line width and defect location, and this data retained as the ‘gold standard' and used as the baseline value for comparison with the AOI results.

The measurement on the glass TV showed good accuracy with respect to SEM measurement data, as the edge measurement with back lighting enhances the accuracy. However, greater deviation of measurement data on the silicon TV was observed because back lighting cannot be used on silicon.

AOI defect inspection

When working with fine features, defects themselves become fine features and those defects  that affect the line integrity (width, length, thickness) can affect data integrity and significantly impact both performance and reliability. By incorporating ‘known' defects in the TVs, the iNEMI team was able to verify AOI's ability to identify and map the defects, a requirement for high-volume manufacturing (HVM).  
The silicon TVs were inspected using AOI equipment from five different companies. (Inspection was limited to the Si TVs as most of the companies only perform inspection on Si). Comparison of the results showed:
  • Commercial equipment from Company B had the highest magnification and was capable of detecting mouse-bite defects for the 1um design. However, the image contrast was not as good as Companies D and E.
  • Companies A and C demonstrated good inspection capability down to 6um.
  • Optical tools with higher magnification and enough power can still be applied for 1um feature inspection/measurement for flat objectives; however, run rate is currently a challenge for both production and R&D tools.
Throughout the data evaluation, it became clear that there were trade-offs between magnification and image contrast. The inspection system that optimized these parameters had the best capability to inspect down to 1um features.   
The study verified that optical tools with higher magnification and enough power and contrast can be successful in evaluating inspection/measurement of 1um feature for non-warpage, uniform targets.  However, the run rate is currently a challenge for both production and R&D tools.
Table 1. Comparison of AOI Equipment
Table 1-1

Trace width measurements

AOI was also used for trace width measurements. In Phase 2, only Company A performed extensive trace width measurement (down to 4um pattern) on one Si TV and one glass TV. Company B also demonstrated trace width measurement down to 4um pattern.

The project team will encourage AOI companies to perform extensive trace width measurement in Phase 3.

Phase 2 conclusions

This study confirms that a capability gap exists between current AOI equipment and the requirements for high-volume manufacturing of sub 2 um, i.e., 2/2 and 1/1 um design. Although run rate is currently a challenge for both production and R&D tools, optical tools seem feasible for high-volume manufacturing for 1um feature.

Phase 3 recently formed

Phase 3 of iNEMI's Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project will further characterize and quantify optical inspection equipment capabilities. The test vehicle for Phase 3 will be fabricated as an organic panel (250mmx 250mm) to simulate HDI substrate fabrication for HSiP (heterogeneous system-in-package), using a design similar to the one used in Phase 2. 

Inspection limitations are likely to impact yield assessment and quality validation on the substrate/interposers used for heterogeneous SiP packages. Measurement capability for fine line (<10um) and space (<10um) on panel-sized substrates/interposers impacts both yield and performance capability. There is greater impact in organic substrate and board yield due to defects from fine-featured line width and spacing violations as well as foreign material.

The Phase 3 organic test vehicle will be designed with known defective fine-featured wiring to comprehensively examine AOI capabilities for handling differences in organic material properties such as color, reflectivity, and surface roughness as well as substrate warpage and shape deformation.

The impact by warpage and trace aspect ratio (trace thickness by trace space) will also be studied in Phase 3. Outputs from Phase 3 will include:
  • Assessment of industry readiness through a comparison of inspection results from industry suppliers on fine pitch organic substrates.
  • Recommendations for fine pattern circuit inspection metrology options.

For more information or to get involved with the Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project, contact Masahiro Tsuriya (

For additional information

Inspection / Metrology Evaluation of Fine Pitch Test Vehicles for Advanced Packages, paper presented at iNEMI Session at ICEP 2019 (April 17, 2019 / Niigata, Japan).