iNEMI Recognizes Accomplishments of Project Teams
• Superior performance of electronics manufacturing practices
• Superior technology and business results
• Positive impact on the electronics manufacturing value chain and its ecosystem
The five project teams are profiled below, along with a list of project members for each. Congratulations to all of the winners.
Eco-Impact Estimator, Phase 3
This project significantly updated iNEMI's Eco-Impact Estimator (EiE) tool and launched a web-based EiE tool at Purdue University. Both tools provide a simplified means of EiE assessment and unique design-for-environment capabilities for information and communication technology (ICT) products, helping users to reduce the time and expense typically required by traditional life cycle assessment tools.
In order to improve and expand the tool, the team had to juggle the challenges of obtaining key life cycle impact assessment data for advanced electronics manufacturing technologies while maintaining company intellectual property rights and secrecy. In addition, development of an openly available database tool within a hosting organization took significant resources and time to successfully implement the required programming while addressing IT security and intellectual property rights issues. The lessons learned from this effort can be leveraged for other projects.
• Lisa Dender, IBM
• Donald Kline Jr., Intel
• Xuda Lin, Purdue University
• Padraig Murphy, Logitech
• Tom Okrasinski, Nokia*
• Alisha Peterson, Intel
• Fu Zhao, Purdue University*
Package Warpage Prediction and Characterization, Phase 5
This project furthered iNEMI's work on dynamic warpage of advanced packaging technologies. The Phase 5 team investigated organic substrate-based packages, enhancing material properties characterization of these types of packages to understand the impact of curing processes on eventual package warpage. The team also derived a reliable modelling framework (model generation, model material parameters, simulation capabilities) to predict package warpage to enable earlier and more accurate prediction of warpage behavior, reducing costs and risk in the industry.
During execution of the project, the team realized a need for a model for shrinkage strain, developed this and added it to the model, resulting in a better fit to data. Shrinkage strain is not available in today's software market, thus the work can improve warpage prediction with shrinkage.
• Philip Chang, CoreTech
• Ryan Curry, Akrometrix
• Chih Chung Hsu, Coretech
• Saskia Huber, Fraunhofer IZM
• Ron Kulterman, Flex
• Wei Keat Loh, Intel
• Kei Murayama, Shinko Electric Industries
• Kang Eu Ong, Intel*
• Arvind Purushotaman, ANSYS
• Pierre-Louis Toussaint, Insidix
• Makoto Tsukahara, Shinko Electric Industries
• Olaf Wittler, Fraunhofer IZM
• Tatsuro Yoshida, Shinko Electric Industries
Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology, Phase 3
Driven by the industry's need for higher density interconnect, this project evaluated seven different AOI (automated optical inspection) systems from different AOI companies to determine measurement capabilities on fine line and space (<10um) copper patterns. The increasingly fine circuit pattern designs and defects found in today's heterogeneous packages can significantly impact yield and reliability, and measurement capability becomes increasingly critical as processes become more complicated and yields are more difficult to control.
This project involved several test vehicle builds and extensive testing to determine AOI measurement capabilities. Test vehicles were designed with fine pitch pattern trace widths from 10um to 1um and incorporated known defective fine-featured wiring to comprehensively examine AOI ability to handle differences in organic material properties such as color, reflectivity and surface roughness, as well as substrate warpage and shape deformation. The project was able to provide critical data and insight into supply chain readiness, current capabilities and development trends for AOI equipment.
• Billy Chung-Yu Cheng, Unimicron
• Jing-Sian Huang, Unimicron
• Alison Yu-Ting Lin, Unimicron
• Glenn Pomerantz, IBM
• Charles Reynolds, IBM*
• Anna Lucy Santos, AT&S
• Neil Tang, AT&S
• Tom Wassick, IBM
• Feng Xue, IBM*
• Channing Cheng-Lin Yang, Unimicron
• Zhihua Zou, Intel
Eco-Design Best Practices for a Circular Electronics Economy
This project comprised a series of six interactive webinars featuring experts from leading organizations that are doing innovative/beyond-compliance eco-design work. Consumers and regulators are driving more awareness and change through the supply chain requiring organizations to implement more eco-design principles for their products. There are several leaders in this area, but most organizations lack the knowledge base and training to effectively apply eco-design principles across their product life cycle. Having industry leaders in eco-design share their insights can have a significant impact on product manufacturing, maintenance, packaging, branding, and end of life throughout the supply chain.
The Eco-Design Best Practices for a Circular Electronics Economy Project provided the electronics manufacturing industry with actionable items — both short-term and long-term —to move toward a circular economy. Presenters shared key experiences and innovative approaches in eco-design across multiple aspects of their businesses to help drive use of eco-design methods across the industry and show other organizations how to leverage eco-design to implement a circular economy approach more efficiently.
• Jason Lee, Celanese
• Tom Okrasinski, Nokia
• Kelly Scanlon, IPC
• Karsten Schischke, Fraunhofer IZM
• Julio Vargas, IBM*
Conformal Coating Evaluation for Improved Environmental Protection, Phase 1
This project studied a discrete application of a new test method that benefits the industry by vastly improving the speed of corrosion rate testing, resulting in a practical application that is of immediate usefulness. Conventional testing methods for evaluation and qualification of conformal coating can be a year-long process done under very limited and harsh conditions well beyond the application conditions. This project's work demonstrated that conformal coatings can be characterized by using the corrosion rates of conformally coated thin films of copper and silver exposed to a sulfur gas environment. Test duration is less than a week compared to a much longer testing required by conventional means. The process developed by the project team provides a convenient and effective conformal coating evaluation test that takes less than a week and can be executed under temperature and humidity condition like that in the field.
• Mike Huang, Wistron
• Jason Keeping, Celestica
• Mei Ming Khaw, Keysight
• Ruby Lin, Wistron
• Larry Palmer, IBM
• Marko Pudas, Picosun
• Prabjit Singh, IBM*
• Kok Lieh Tan, Keysight
• Chen Xu, Nokia*