Start Date: 4/13/2023 10:00 AM JST
End Date: 4/13/2023 11:00 AM JST
Project Call-for-Participation Webinar
If you are interested in this project, please join one of our call-for-participation webinars. Two sessions are scheduled and are open to industry (iNEMI membership is not required). Participants must register in advance — see links below.
Thursday, April 13, 2023
10:00-11:00 a.m. JST (Japan)
9:00-10:00 p.m. EDT (US) on April 12
6:00-7:00 p.m. PDT (US) on April 12
Register for this webinar
Thursday, April 13
9:00-10:00 a.m. EDT (US)
3:00-4:00 p.m. CEST (Europe)
10:00-11:00 p.m. JST (Japan)
Register for this webinar
The Low Temperature Materials for First Level Interconnect Task Force reviewed material and process options currently available or under development to determine whether low temperature materials being used in other levels of electronics assembly could also be used for first level interconnects.
The group published a white paper that identified industrial needs and drivers requiring more in-depth study to understand the assembly process challenges, material property versus reliability performance, and the feasibility of employing low temperature materials for first level interconnect. Some of the issues include:
- Temperature-sensitive substrates, die or sensors that require lower processing temperature for most of the current flip-chip or first level interconnect.
- The need for an interconnect material processing temperature hierarchy for multiple assembly processes that can prevent remelting issues during subsequent reflow process.
- Limited work has been done on the reliability aspect of mixed alloy/hybrid interconnect for first level interconnects in areas such as: high current density, assessing void effects with low temperature alloys / materials, understanding the availability of low temperature low alpha material and others.
The Low-Temperature Material Discovery and Characterization for First Level Interconnect
project will focus on the need for, and impact of, low alpha low temperature materials. The team will look at the availability and current status of these materials for use in first-level interconnect. Modelling will be used to predict the effect of various low-temperature materials and processes on interconnect integrity, followed by experiments on assembled interconnects to observe changes in the characteristics of the low-temperature material compared to standard materials.
For additional information, please contact Masahiro Tsuriya (firstname.lastname@example.org