Advancing Manufacturing Technology

HFR-Free PCB Material Evaluation Project

Chair:  Stephen Tisdale (Intel Corporation)
 

End-of-Project Webinar & Report

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Background & History

Phase I - Design (completed)  
Phase II - Test  (completed)
Phase III - Results
Follow-On Project: HFR-Free High-Reliability PCB

Objectives
Promote standards development by establishing materials, manufacturing, assembly, and test guidelines for halogenated flame retardant (HFR)-free printed wiring boards based on market segment requirements and technical, commercial, and functional viability.

Motivation
The European Union's Restriction on the use of certain Hazardous Substances (RoHS) Directive prohibits the use of polybrominated biphenyls (PBBs) and polybrominated diphenyl ethers (PBDEs) in nonexempt electronic equipment. These compounds are typically used as flame retardants and some of these substances have been shown to present unacceptable risks to human health and the environment.

Although PBBs and PBDEs are not used in circuit board materials, stakeholders are beginning to urge the electronics industry to take a precautionary stance on the use of other non-regulated halogenated organic substances, such as the use of brominated epoxies for circuit board applications.

Phase I: Design (completed)

In Phase I, the project team identified market segment requirements, candidate materials, key performance characteristics, and test criteria:
  1. Identify market segment requirements
    Consult iNEMI PEGs to identify unique BFR-free requirements for product sectors (automotive, aerospace/defense, consumer/portable, medical, netcom, office/large business systems and system-in-package).
  2. Identify candidate materials
    Poll the supplier base, keying in on candidate materials that are commercially viable with consideration for market segment applications.
  3. Identify key performance characteristics and test criteria
    Assess prior studies and identify critical knowledge gaps or technical issues.  Make recommendations for performance tests needed.  Review results of prior industry and member company investigations.
  4. Design test vehicle(s) and test methodologies, leverage standards where possible
    Specify test vehicle criteria required for performance testing.  Agree on a minimal number of test vehicle designs and test requirements.
PRESENTATION:  iNEMI Halogen-Free Project (BFR-Free PCB Project), Phase I Review, Steve Tisdale (Intel) and Roger Krabbenhoft (IBM), Open Meeting (September 26, 2006)

Request for participation: Halogen-Free Printed Circuit Board Materials Project (now the BFR-Free PCB Project), April 2006

APPROVAL DRAFT:  Statement of Work, v 2.4 (January 18, 2006)

Phase II - Test
In Phase II, the group has developed test plans that focus on electrical characteristics, delamination, and via reliability, and has secured agreement from suppliers and fabricators to build the test vehicles with the materials outlined in Phase I. The group plans to measure the broadband frequency-dependent dielectric constant and loss tangent of candidate halogen-free laminate materials (10KHz-20GHz).  They will then determine the compatibility of candidate laminate materials with higher-temperature assembly process reflow environments (mixed solder: 245˚C; Pb-free: 260˚C). Throughout this process, the team will consider unique market segment requirements, identify technology readiness and gaps, and stimulate supply capability.

Phase II (Test) Proposal, March 22, 2007

Phase II (Test) Presentation, February 2007

BFR-Free PCB (formerly Halogen-Free) revised SOW, Draft 2/7/07

Webinar (September 17, 2008)

Phase III - Results
In Phase III, the project team will compile results, assess significance, make recommendations, and publish a report:
  1. Assess technology readiness / identify gaps
    Flag unexplored issues and identify technical risks that need to be resolved before materials can be widely adopted.  Make recommendations for future work.
  2. Assess manufacturing capability and supply capacity
    Work with suppliers and EMS providers to identify barriers to supply chain viability. Interpret  implications of performance testing in terms of manufacturing capability.
  3. Publish results
    Compile and edit concise summary of methods, meaningful results, and recommendations.