Combined Efforts of INEMI Projects Help Industry Quantify the Impact of Low Temperature Solder on Electronic Package Dynamic Warpage Behavior

Adoption of low temperature solder (LTS) has increased over the years. The fundamentals of dynamic warpage are well established in the SMT industry, but there is minimal literature on the application of low temperature solders, specifically for SAC BGAs with low temperature solder paste. INEMI's Warpage Characteristics of Organic Packages project has conducted a wide range of dynamic warpage characterization for different electronic package types — package-on-package, fine pitch BGA, large FCBGA packages with and without lids, and PBGA packages. The resulting warpage database, generated over more than 10 years, combined with results from INEMI's BiSn-Based Low-Temperature Soldering Process and Reliability project, can help industry understand and quantify the impact of low temperature solder on dynamic package warpage behavior. 

Factors Affecting Dynamic Warpage

Electronic package warpage must be managed to ensure the final package can be easily assembled on a board. Over the last decade, lead-free Sn-Ag-Cu (SAC) solder has been widely adopted in components and board assembly. SAC process conditions require higher reflow temperatures and result in lower ductility than traditional lead-based solder systems. The higher processing temperatures can aggravate dynamic package warpage to more extreme levels. Some electronic packages — such as plastic ball grid arrays (PBGAs) — demonstrate a higher sensitivity to temperature changes and the resulting warpage can result in defects such as solder bridging and non-contact opens, which can impact yield.

Dynamic warpage of a package is affected by several factors – not just the soldering temperature profile. For example, packaging materials, size and construct have an impact as does the PCB layout and construction. There are several significant variables that have an impact and they all distill down to synchronization of temperature, warpage and phase of solder.

Low Temperature Solder Solutions

Advances in alloyed solder materials have led to the introduction of low temperature solders that melt and solidify at a range of temperature from 130°C to 200°C. The resulting lower reflow temperatures required inherently reduces energy demands and may favor the dynamic interaction between package warpage and solder phase formation.

INEMI's BiSn-Based Low-Temperature Soldering Process and Reliability (LTSPR) project, started in 2015, is studying the possible impact of various LTS pastes on SMT processability, mechanical shock and thermal cycling reliability. The project has been primarily focused on the mixed SAC-BiSn solder joints (assembly of components with SAC solder balls attached to packages with LTS paste screen printed on the board for SMT), but also covers some evaluation of homogenous solder joints (LTS solder ball with LTS solder paste).

One of the key defects highlighted in adopting BiSn-based LTS paste is the hot tearing defect of mixed SAC-BiSn alloy solders which was observed in FCBGA joints located at the die shadow. Hot tearing is thought to be caused by an interaction of Bi stratification at the package interface coupled with dynamic warpage of the FCBGA package as it cools from peak reflow temperatures. It can also occur without Bi stratification if the solidification temperature overlays with the package substrate package warpage shape inversion temperature. Hot tearing defects are a critical concern and solutions may exist to enable LTS in SMT processes as an attempt to mitigate yield and reliability associated with high dynamic warpage behavior.

INEMI'S Dynamic Warpage Database

The data gathered from INEMI's characterization of different electronic package types was further analyzed to establish the impact of LTS temperature profile on dynamic warpage
 
Failure modes associated with SAC systems are typically limited to solder bridging, non-contact opens and head-on-pillow (HoP). Dynamic warpage with low temperature solder is not only governed by the maximum peak and valley warpage values at peak reflow temperature but also the rate and magnitude of change during the solidification phase of low temperature solder. This shows that SMT defects for LTS systems can relate in a different way to dynamic warpage of the package and need to be evaluated. 

Impact of SAC and Low Temperature Solders on Dynamic Warpage

Reflow profile and critical temperature points

Most BGA packages have SAC-based solder balls attached. The typical reflow profiles depicted in Figure 1 show the overlay of the SAC baseline reflow profile with the other three LTS paste types employed in the INEMI LTS studies. The SAC baseline, eutectic BiSn baseline, ductile BiSn, and joint reinforced paste (JRP) were all studied to provide a fundamental understanding of the solder joint formations. 

Dynamic warpage interaction with SMT defects

Electronic package dynamic warpage behavior was the key assessment for this INEMI study. The typical warpage behavior that changes with temperature is shown in Figure 2. In this graph, there are three general dynamic warpage characteristics for Packages A, B and C. The dynamic warpage of Package A best resembles a typical PBGA package while Packages B and C resemble typical FCBGA packages. Package A started off as a concave shape (-ve) and transitioned to convex as the temperature increased. Packages B and C started off as convex shapes ( ve) and transitioned to concave shapes. The difference between Packages B and C is mainly the magnitude of warpage at higher temperature where Package C has higher peak temperature warpage.

View Figure 2. Typical dynamic warpage behavior and LTS key characteristics.

The dynamic warpage metrics of LTS reflow profiles may be different from SAC profile as follows:
Reduction of peak reflow warpage from 260°C to ~182°C
Reduction of warpage at a point of initiation of solder solidification of LTS at ~150°C as compared to eutectic solidification of SAC solder at ~220°C
Warpage change during the LTS solidification phase between 150°C to 125°C where the solder may be deformed as it cools
Warpage change slope and shape inversion from convex to concave or vice versa

These temperature points were considered because of the availability of existing data of dynamic warpage for various packages. Each of these metrics was studied primarily to quantify the impact of the use of LTS on dynamic warpage behavior and perhaps explain the benefits and considerations of adopting LTS paste based on the improved dynamic warpage response of the package. Apart from dynamic warpage behavior, the package rigidity at the LTS solidification phase temperature is expected to be higher compared to the SAC solidification temperature due to the increased structural stiffness of the package at lower temperature which exerts greater tensile and shear stresses on the solder joints. This could potentially lead to the hot tearing defects mentioned previously.
 
By leveraging the dynamic warpage data collected across various package technologies, the Warpage Characteristics project team was able to analyze each of the warpage changes resulting from reduced peak reflow temperature, solidification temperature and solidification phase of LTS. They also compared magnitude of change between the package families (Figure 3).

View Figure 3. Warpage magnitude change for package-on-package and FBGA families.

Comparing the magnitude change can be a challenge as each package has its unique dynamic warpage characteristic. Hence the percentage of warpage change in adopting to an LTS solder system is relevant to the SAC peak warpage reflow at 260°C. Figure 4 shows the percentage of warpage change for the various families of package technology. The markers denote the trending of the warpage change where not all types of packages experience a reduction of warpage as a result of adopting LTS.

For PoP and FBGA packages, the warpage change ranges from negligible impact to a factor of ~1000%. This extreme change is due to the fact that the warpage using LTS is a few orders of magnitude higher than the warpage at 260°C. This, however, reflects the change of warpage percentage and not the absolute warpage magnitude. The majority of the package warpage change is as low as 10% to about 100%. For FCBGA and FCBGA MCP packages, the majority of the packages considered show about 20% to 100% warpage reduction and a few show warpage increases as well. This reduction seems reasonable as the results of 30% to 50% warpage reduction were reported. As for FCBGA with lids, the percentage of warpage reduction is about 20% to 50%. The even lesser change for large packages is mainly due to the constraint from the lids coupled with thicker constructions. The majority of PBGA packages shows a warpage reduction from 40% to 250%. This higher warpage reduction seen in PBGA is attributed to the higher sensitivity of the package to temperature as a result of the higher volume of mold encapsulations used.

View Figure 4. Overall peak reflow warpage reduction percentage.

Conclusion

The dynamic warpage of electronic packages can be different when assembled onto the PCB using LTS versus eutectic solder such as SAC systems. In most cases, the peak reflow warpage and solder solidification warpage reduce in magnitude, depending on package type and design construction. The LTS solidification phase happens in a range of temperatures that, coupled with the change of warpage magnitude and shape, can elevate the risk of hot tearing.

The percentage of warpage change for each of the package families provide an estimation of the impact of LTS and not all packages experience a reduction of warpage magnitude as a result of adopting LTS.

The extensive data INEMI has amassed through characterization of different electronic package types, coupled with the results from project work on low temperature solder, gives manufacturers a better understanding of, and ability to anticipate, warpage behavior and the possible consequences of adopting LTS for assembly. This allows the possible risks of hot tearing defect to be mitigated by optimizing the reflow profile.

For Additional Information

This article is based on the paper, “Impact of Low Temperature Solder on Electronic Package Dynamic Warpage Behavior and Requirement,” presented at IEEE's Electronic Components and Technology Conference (ECTC) in 2019. Download the paper for a more detailed discussion of the analyses conducted. For information about INEMI's latest warpage-related projects check out our Warpage Characterization and Management Program.

Webinar on predictive modelling for Bi-material strip warpage

The Warpage Characteristics of Organic Packages project will report updated simulation results in a webinar on September 30. In Phase 4 of the project, the team saw inconsistencies in the results of modeling versus. experiments for Cu/mold bi-material strip warpage. Further simulations have been conducted to study the cure shrinkage properties and post mold cure (PMC) process. The results indicate that curing has significant impact on warpage amplitude and the PMC process does not affect warpage trends. The studies also demonstrate that simulation can capture warpage at high temperatures.